1. Field of the Invention
The present invention generally relates to photolithography and associated methods and apparatus for exposing semiconductor substrates.
2. Description of Related Art
Lithographic exposure apparatuses can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, a patterning device may generate a circuit pattern corresponding to an individual layer of the IC. In photolithography, a beam of radiation is patterned by having that beam traverse the patterning device, and is projected by a projection system of the lithographic apparatus onto a target portion (e.g., comprising one or more dies) on a substrate (silicon wafer) that has been coated with a layer of photo-activated resist (i.e., photoresist) material, such as to image the desired pattern in the resist. In general, a single wafer will contain a whole-network of adjacent target portions that are successively irradiated via the projection system, one at a time.
In the semiconductor industry, the continual demand for smaller semiconductor devices, having smaller patterns and features on the wafer substrate, is pushing the limits on the optical resolution that can be achieved by lithographic exposure apparatus. Generally, the smallest size of a repeatable feature (e.g., “half-pitch”) of a pattern exposed on the wafer substrate that can be optically resolved by lithographic exposure apparatus, depends on attributes of the projection system and the (patterned) projection beam of radiation. In particular, the optical resolution for half-pitch feature size may be derived by using the simplified form of the Rayleigh resolution equation:p0.5=k1·λ/NA, with k1≧0.25  (1)
where: p 0.5 represents the repeatable feature size (e.g., “half-pitch”) in nm;
NA represents the numerical aperture of projection system;
represents the wavelength of projection beam, in nm; and
k1, is a factor representative for the achievable optical resolution limit for the half-pitch feature size.
As indicated above, the theoretical optical resolution half-pitch lower limit for k1 is 0.25. In an attempt to approach the k1=0.25 barrier, considerable efforts have been directed to develop expensive technologies that are capable of employing shorter wavelengths and/or higher numerical apertures, thus allowing production of smaller features while not violating the k1≧0.25 constraint. However, these technologies do not enable a circumvention of the k1=0.25 barrier to arrive at effective values of the k1 such that k1 <0.25.
For printing a dense pattern of lines and spaces (i.e., providing lines of hard mask material that serve as etch stop, with spaces in between allowing for etching of a target layer underneath the hard mask) where the lines occur at a pitch p, it is known that circumvention of the k1=0.25 barrier is possible by applying a double exposure lithographic process, whereby a desired pattern of dense lines and spaces to be printed is decomposed into two constituent sub-patterns of trenches (arranged at a pitch 2p) that are capable of being optically resolved by the lithographic system. A Si wafer is coated with a SiO2 film serving as hard mask, and the SiO2 film is coated with a negative tone photoresist material layer. By exposure to an image where trenches appear as dark lines arranged at a pitch 2p on a bright background, and a subsequent development of the resist material, a first resist mask comprising trenches at a pitch 2p is provided on the SiO2 film. By a subsequent etching of the a SiO2 film and a stripping of the resist the first sub pattern of trenches is transferred to the SiO2 film. Next, the process of applying negative tone resist material, exposing, developing and etching is repeated with a second sub-pattern of trenches, which may correspond to the first sub-pattern of trenches off-set by a half-pitch distance thereby interlacing new trenches between the previously defined trenches. As a result, the first and second sub-pattern images are combined to produce the desired pattern in the SiO2 film on the target layer, whereby the trenches are the spaces between the lines. Here the need for two etching steps to transfer the final desired pattern to a hard mask reduces the throughput of the lithographic process with respect to a single exposure process unless additional etch capacity at additional cost is provided.